Qubit Control IC Designer
Job Summary
In this position, you will be joining a team of incredibly talented engineers focused on the challenging task of building the control electronics for Intel quantum computers. The team is focused on leveraging the latest Intel CMOS processes, packaging, and integration technologies to develop novel qubit control architectures and circuits that can scale to millions of qubits. You'll be working at the intersection of cutting-edge semiconductor technology and quantum physics, creating solutions that push the boundaries of what's possible in computing.
Key Responsibilities
System Architecture and Design: Architect, design, and test complex mixed-signal system-on-chip (SoC) and FPGA solutions that interface the microinstruction layer of the quantum computing stack to actual qubits
Generate complex control signals required to drive and read qubit states with precision and reliability
Signal Integrity Excellence: Perform signal integrity analysis and optimization for qubit chips to ensure optimal performance
Apply electromagnetic (EM) modeling and simulation tools for signal integrity and crosstalk analysis
Collaborative Innovation: Work in close collaboration with both software/algorithms and qubit development teams to create integrated solutions
Bridge the gap between quantum physics and practical electronic implementation
Qualifications
Minimum Qualifications: Bachelor's, Master's, or Ph.D. degree, with 5+ years of relevant experience. Qualified experience may have been gained through professional employment, academic institutions, research activities, university projects, coursework, or other comparable educational and professional endeavors.
Experience with RF/analog/mixed-signal circuit tape-out completed in an advanced process technology and lab testing
Experience with silicon prototyping flow (design, validation, layout, tape-out, testing)
Experience with architecture, design, implementation, and verification of mixed-signal systems including circuit blocks such as LNAs, Mixers, PAs, PLLs, VCOs, ADCs, DACs
Preferred Qualifications: Experience with electromagnetic (EM) modeling and simulation tools and their application to signal integrity/crosstalk analysis for high-speed/high-density on-chip/on-package interconnect
Expertise with DSP/signal processing skills
Experience with quantum computing
Expertise for qubit design, fabrication, and control (preferred focus on spin qubits)
Hands-on experience with qubit characterization and control with dilution refrigerators and room lab-grade control electronics
Job Type
College Grad
Shift
Shift 1 (United States of America)
Primary Location
US, Oregon, Hillsboro
Additional Locations
- US, Arizona, Phoenix
- US, California, Folsom
- US, California, San Jose
- US, California, Santa Clara
- US, Colorado, Fort Collins
- US, Massachusetts, Beaver Brook
- US, Texas, Austin
Business Group
The mission of the Corporate Technology Office (CTO) is to incubate and develop strategically important emerging technologies that will serve as building blocks for computing systems and platforms of the future. This is done in collaboration with the business units of Intel, with the goal of transferring these technologies to the business units for productization and revenue generation.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
Annual Salary Range
$122,440.00 - 232,190.00 USD
Work Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.