Product Physical Failure Analysis Engineer

At Altera™, our independence as the world’s largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

We are seeking an experienced semiconductor Physical Failure Analysis Engineer responsible for root cause identification on yield, reliability, and customer returns. This role drives failure identification in processes and products and searches for improvements to enhance yield, performance, quality, and reliability of next-generation product and package technologies. You will collaborate with design and process development engineers to determine the relationship of materials properties and electrical performance, thoroughly explaining fundamental aspects of material and device interactions to assist in transferring new products to manufacturing. Additionally, you will contribute to the development of electrical, analytical, and mechanical methodologies by creating failure mode and effects analysis (FMEA) and maintaining control plans throughout the product lifecycle.

Responsibilities

• Collaborate with Product/Yield/Reliability Engineers to drive fault isolation during product development, yield improvement, and reliability risk assessments
• Support physical failure analysis and root cause determination of semiconductor device failures
• Collaborate with Fault Isolation Engineers or independently interpret Emission microscopes, Laser Voltage Probing, and OBIRCH data to define physical failure analysis processes
• Independently define and execute physical failure analysis using tools such as SEM, FIB, and EDX
• Utilize layout, schematic, and design analysis tools
• Develop reports and communicate findings to responsible engineers on a regular basis
• Apply strategic failure analysis capabilities for future technologies and products, drive automation and improvement of failure analysis processes, and conduct innovative use of new analytical tools, equipment, and methodologies
• Develop, record, and perform failure analysis on systems and components to identify root cause, analyze failure reports, and recommend corrective action to prevent reoccurrence of problems

Requirements

• BS degree in Electrical Engineering, Materials Science, Physics, Mechanical Engineering, or a related field
• 8+ years of experience in semiconductor failure analysis
• 8+ years of experience with Layout & Design tools (Virtuoso, Avalon, SysNav, etc.)
• 8+ years of experience independently implementing failure analysis using die milling/thinning, Focused Ion Beam milling for layer-by-layer deprocessing of silicon die, Scanning Electron Microscopy, and Energy Dispersive X-ray Spectroscopy
• 8+ years of experience driving investigations to root cause and driving yield/reliability improvements

Qualifications

• Understanding of FPGA architecture
• Understanding of design debug features (DFT)
• Experience with using Teradyne Ultraflex tester
• Experience in semiconductor packaging failure analysis

Pay

The pay range below is for Bay Area, California only. Actual salary may vary based on job location, job-related knowledge, skills, experiences, trainings, and other factors. Incentive opportunities are also available, rewarding employees based on individual and company performance.

$149,100 - $215,925 USD

Schedule

Shift 1 (United States of America)

Applicants must be eligible for any required U.S. export authorizations.