Jobs · Research · Oregon

Product Engineer, Tessent logic test

HybridResearch$90k–$162k/yrFull-time

About the role

The Tessent division seeks a highly motivated, creative, and energetic individual as Product Engineer, specializing in design-for-test (DFT) and test delivery at chip and system level. Tessent is the market and technology leader of automated tools for insertion of semiconductor design-for-test (DFT) structures, automatic test pattern generation (ATPG), embedded deterministic compression (EDT), memory built-in self-test (MBIST), logic built-in self-test (LBIST), IEEE 1687 IJTAG, analog fault injection and test. This position presents a great opportunity to stay involved technically while getting exposure to marketing and interacting with sales.

Responsibilities

  • Define and characterize new product capabilities needed to meet customer requirements
  • Work collaboratively with Tessent R&D to prototype, evaluate, and test new products and features within complex IC design flows
  • Lead beta programs and support beta partners
  • Drive product adoption and growth
  • Create and deliver in-depth technical presentations, develop training material, white papers, contributed articles, and application notes
  • Develop and review tool documentation such as user and reference manuals
  • Work with customers as well as Siemens EDA stakeholders such as regional application engineers, global support engineers, and marketing
  • Work through complex technical issues and independently create solutions and new methodologies
  • Present complex principles in simple terms to broad audiences
  • Collaborate and share information across team boundaries in written and spoken forms
  • Some travel, domestic and international

Qualifications

  • Absolutely required: BS degree (or equivalent) in Electrical Engineering, Computer Science, Computer Engineering, or related field
  • Experience: 1-3 years of experience, including experience in DFT for complex ASICs / SOCs within one or more of the following areas: Automatic test pattern generation (ATPG), internal scan, embedded scan compression (EDT), packetized test delivery (SSN), memory built-in self-test (MBIST), logic built-in self-test (LBIST), IEEE 1687 IJTAG, analog design and simulation, hierarchical DFT implementation
  • Desired: Industry experience with DFT tools, preferably Siemens Tessent tool suite
  • Experience: Experience with inserting scan, running ATPG and debugging fault coverage
  • Preferred: Exposure to one or more adjacent IC disciplines such as the following a plus: - RTL coding and verification using Verilog/SystemVerilog/VHDL - Synthesis and timing analysis - Place and route - Advanced IC packaging - DFT and test for embedded IP cores - Failure diagnosis
  • Desired: Prior experience as individual contributor as well as directing technical activities of junior engineers (mentoring or training)

Preferred Knowledge/Skills, Experience

  • Proficiency in LINUX and Windows environments
  • Proficiency in a scripting language like TCL (preferred) or Python
  • Excellent written and spoken English language communication skills
  • Excellent organizational skills

Benefits

Details regarding our benefits can be found here.

Pay

The pay range for this position is $90,000 - $162,000 annually with a target incentive of 3-5% of the base salary. The actual wage offered may be lower or higher depending on budget and candidate experience, knowledge, skills, qualifications, and premium geographic location.

Equal Employment Opportunity Statement

Siemens is an Equal Opportunity Employer encouraging inclusion in the workplace. All qualified applicants will receive consideration for employment without regard to their race, color, creed, religion, national origin, citizenship status, ancestry, sex, age, physical or mental disability unrelated to ability, marital status, family responsibilities, pregnancy, genetic information, sexual orientation, gender expression, gender identity, transgender, sex stereotyping, order of protection status, protected veteran or military status, or an unfavorable discharge from military service, and other categories protected by federal, state or local law.

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