Principal Software Engineer

Responsibilities

• Define and drive firmware architecture for Silicon firmware libraries for ANC, Compute, and SoC infrastructure subsystems.
• Influence microarchitecture decisions by working closely with silicon architects during specification and design phases.
• Lead firmware strategy across multiple silicon generations and platform programs.
• Provide technical leadership across firmware, hardware, validation, and software organizations.
• Develop silicon firmware libraries in C/C++ for Compute engines, ANC sub system, DMA Engines, and other similar IP blocks.
• Develop scalable and maintainable firmware frameworks and APIs.
• Lead first-silicon bring-up activities.
• Drive root-cause analysis for firmware, hardware, performance, and validation issues.
• Define firmware verification requirements and test plans.
• Lead cross-team initiatives spanning firmware, silicon architecture, software, security, and system integration.
• Create engineering alignment across geographically distributed teams.
• Collaborate with Azure hardware, platform software, systems, and validation organizations.
• Represent firmware technical direction in leadership and architecture reviews.
• Develop engineering best practices, coding standards, and architectural review processes.
• Guide and support engineers across experience levels in their professional and technical growth.

Qualifications

• Bachelor's Degree in Computer Science or related technical field AND 6+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR equivalent experience.
• 12–15+ years of experience in firmware, embedded systems, or SoC development.
• Experience as a technical lead for complex silicon or firmware programs.
• Demonstrated ownership of architecture, development, and delivery of production-quality firmware.
• Good Programming skills in C/C++ and Python.
• Experience in CPU and accelerator architecture, ARM/RISC architectures, On Chip Interconnect.
• Experience in designing Boot loader, Platform Initialization sequences, Silicon Abstraction layers.
• Experience in domains like Network controllers, and high-performance compute sub systems.
• Silicon bringup. Debug and experience in using JTAG , Lauterbach TRACE32 and other debug tools.
• Experience in using Emulation and FPGA ;Platforms.
• Experience with Azure hardware platforms.
• Experience with AI accelerator silicon.
• Experience with confidential computing and security firmware.
• Experience working with emulation platforms (Zebu, HAPS, Palladium, Veloce).
• Experience with firmware performance optimization and telemetry.
• Experience in RAS, reliability, and serviceability architecture.