Principal SoC Design Engineer

About the role

Our Solution Engineering division develops SoCs for various application segments, using the latest IP products from Arm and other vendors. We are looking for a creative and hard-working SoC Design Engineer to join a small, dedicated team in San Diego. You will contribute to the specification, design, and verification of SoC products while collaborating with multiple internal Arm groups to deliver systems optimized for performance and power.

Responsibilities

• Develop logic for high-performance compute and AI solutions as part of the design team.
• Understand and review SoC architecture, then create design specifications that meet complex power and performance goals.
• Craft design micro-architecture specifications, develop RTL, fix bugs, run design checks, and generate implementation constraints.
• Collaborate with the verification team to review test plans, debug design issues, and ensure design quality closure.
• Work with performance and power analysis teams to evaluate and improve SoC performance and power efficiency.
• Contribute to developing and enhancing design methodologies used by the team.
• Mentor and support other team members to enable successful project completion.
• Balance additional responsibilities, such as collaborating with Project Management on plans and schedules.

Requirements

• Bachelor’s or Master’s degree in Computer Science, Electrical/Computer Engineering, or a related field.
• 10+ years of experience in the design of complex compute subsystems or SoCs.
• Experience in digital hardware design for complex systems using Verilog HDL.
• Experience with power and clock domain crossing and static design checks (linting, CDC/RDC, X-propagation).
• Exposure to all stages of design: concept, specification, implementation, power/performance analysis, optimization, testing, documentation, and support.
• Experience or knowledge in synthesis, timing constraints, and power management techniques.
• Experience collaborating with verification teams on design quality closure.
• Proficiency in Perl, Python, or other scripting languages.
• Leadership, mentoring, or coaching experience.

Skills

Nice to have:

• Experience with ARM-based designs and/or ARM System Architectures.
• Experience with SystemVerilog and verification methodologies (UVM/OVM/e).
• Experience with UPF, IP-XACT.
• Experience leading teams or projects.
• Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet, etc.
• Understanding of DFT topics: RTL testability, scan insertion, OCC.