Principal Silicon Validation Engineer, SerDes/PAM4
Astera Labs · San Jose, CA · 4 mo ago
Quality Assurance$185k/yrFull-time
Basic Qualifications
- Strong academic and technical background in Electrical or Computer Engineering. At minimum, a Bachelor’s is required, and a Master’s is preferred.
- 8 + years' experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
- Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for internal meetings in advance, and to work with minimal guidance and supervision.
- Entrepreneurial, open-minded behavior and can-do attitude. Think and act with the customer in mind!
- Proven track record solving problems independently, executing validation plans for complex SoC designs.
Required Experience
- Experience leading SoC Debug and development for high-speed interfaces such as PCIe5, PCIe6 or PAM4 802.3 Ethernet.
- Familiarity with Electrical Compliance section of PCIe Base Spec and CEM Spec
- Working knowledge of key, high-speed design blocks such as PLL’s, DFE, Tx EQ, CDR, etc and concepts such as PAM4
- Experience in PRBS testing and optimization of high-speed PCIe data links over short, med, and long channels
- Strong python scripting ability: knowledge of object-oriented programming and basic dev ops using git for source control and collaboration
- Deep background in developing bench automation techniques, preferably using Python, with emphasis on execution efficiency, repeatability, and data analysis.
- Proficiency using high-speed lab equipment such as BERT, Oscilloscope, and VNA
Preferred Experience
- Familiarity with PCIe/CXL compliance standards and ability to drive electrical compliance testing at industry workshops
- Hands-on experience with signal integrity, especially as it relates to PCIe testing, Channel Loss budgeting, and de-embedding
- Familiarity with PCIe standards and both NRZ and PAM-4 signaling
- Knowledge of simulation tools such as MATLAB, Keysight ADS, or PLTS for data analysis and modeling of electrical channel and signal integrity issues