Principal Silicon Engineer - System Modeling

Responsibilities

• System Modeling of analog circuits & SerDes interface IP
• Post Silicon interface between ATE/Validation and design teams including co-ordination of debug activities
• Contribute to architectural direction and analog circuit level architecture

Qualifications

• Required Qualifications:
• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
• Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
• Equivalent experience

Other Requirements

• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.

Preferred Qualifications

• MS in Electrical Engineering or PhD in Electrical Engineering
• 10+ years with MS EE and 7+ years with PhD in Electrical Engineering
• Experience with deep sub-micron nodes and hands on layout optimization experience
• Experience Matlab (Simulink) & modeling
• Understanding of Digital and analog Control loops model analysis
• Post silicon validation experience in High speed IOs
• Experience running analog circuit simulations (Cadence Spectre, HSPICE)

Benefits

The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year. Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay