Principal Product Engineer - Virtual Protocols

Job Description

This Principal Product Engineer position is with the Virtual Protocols Product Engineering Team, responsible for the successful field readiness and customer deployment of our Transaction Based Acceleration and Virtual Emulation-based System Verification products. This position presents exciting opportunities and challenges of becoming an expert in System Level Software Driven Verification use models that leverage advanced protocol engines operating on Cadence’s Palladium and Protium Emulation products to enable the critical shift-left of System Level SOC verification and Validation for Cadence customers.

Team

The Virtual Protocols Product Engineering team works closely with R&D, the Cadence Field team, and directly with key customers to identify product requirements. You will be an essential partner to the R&D team delivering product feature definition and product feedback. You will be a leveraged asset for the field and marketing teams to demonstrate our product’s performance, debugging, and functionality value. You will become a trusted advocate for top Cadence customers helping guide them to the best use of Cadence technologies while also capturing their needs back into R&D.

Position Responsibilities

• Using expertise in OS, kernel, and driver SW development to support Cadence VirtualBridge products that combine a Virtual Machine running a production OS with the customer’s SOC Design running on Cadence’s Palladium emulation or Protium Prototyping platforms.
• Using Verification methodologies and SW development expertise to help customers utilize Cadence’s Accelerated Verification IPs and advanced APIs and verification Methodologies to accelerate and shift-left their pre-silicon SOC verification and System validation Coverage.
• Using protocol expertise to drive the requirements and deployment of new protocol products and features in crucial industry standard protocols like PCIe, CXL, Ethernet, USB, AMBA
• Using emulation and prototyping expertise to drive virtual product performance and supporting customers in getting the most out of their Hardware platform investment and meet their validation goals.

Desired Job Skills

• Protocol knowledge - PCIE, CXL, Ethernet, USB, AMBA (any preferred)
• Verification Methodologies (UVM SystemVerilog / Virtual Prototyping SystemC / Portable Stimulus)
• Software development (C/C++ /Object Oriented programming / Linux Kernel/Driver Development)
• SOC design and verification experience (preferred)
• Hardware emulation experience (preferred)
• HDL language knowledge (SystemVerilog, VHDL)
• Scripting language knowledge (shell, python, perl)
• Compiler tools (make, gcc/g++)

Education And Experience Requirements

• Bachelors degree in Computer Science or Electrical Engineering with a minimum of 7 years of related experience, or Masters Computer Science or Electrical Engineering degree with a minimum of 5 years of related experience

Benefits

• Paid vacation and paid holidays
• 401(k) plan with employer match
• Employee stock purchase plan
• A variety of medical, dental and vision plan options