Principal Mixed Signal Architect

About the role

We are seeking a Principal Mixed-Signal Architect to lead the definition and development of high-performance mixed-signal subsystems for advanced communication and data-conversion SoCs.

Responsibilities

• Own top-level specifications for mixed-signal subsystems, including: Link budgets for SerDes (PAM4/NRZ) ENOB/SNDR targets for high-speed ADCs
• Develop high-level behavioral models in MATLAB, Simulink, or SystemVerilog-AMS to validate system performance before circuit implementation
• Evaluate make-versus-buy decisions for SerDes and ADC IP and recommend the best technical and business path. For internally developed solutions, lead circuit architecture and design implementation of key analog/mixed-signal blocks such as PLLs, VGAs, TIAs, and quantizers
• Define calibration and adaptation algorithms, including FFE, DFE, and adaptive gain control, that are implemented in RTL and used to optimize analog block performance
• Drive cross-functional architecture tradeoffs across analog, digital, packaging, and system teams
• Lead post-silicon validation of mixed-signal subsystems in the lab using high-speed test equipment such as oscilloscopes and BERTs. Support debug, characterization, and performance correlation between simulation and silicon results
• Provide technical leadership and mentorship across mixed-signal architecture and design activities

Qualifications

• Bachelor of Sciences Degree in Electrical Engineering with a focus on Analog/Mixed-Signal design
• 15+ years of experience in mixed-signal IC design
• Proven track record delivering high-speed SerDes (16G/32G/56G/112G) and high-speed ADCs such as SAR, Pipeline, or Sigma-Delta architectures
• Deep experience in advanced FinFET process nodes (7nm, 5nm, or below)
• Strong expertise managing layout-dependent effects (LDE), electromigration, and other advanced-node implementation challenges
• Expert knowledge of industry-standard design and simulation tools including Cadence Virtuoso, Spectre/HSPICE, and AMS Designer
• Strong understanding of mixed-signal system architecture, performance tradeoffs, and silicon validation
• Experience working across architecture, circuit design, RTL, packaging, and lab validation teams