Principal IC Layout Engineer

About the ATE Group

The Automatic Test Equipment (ATE) organization within Instrumentation delivers high-performance solutions that enable production testing of advanced electrical and electronic systems—from high-speed microprocessors to high-voltage EV battery modules. We partner closely with customers to define cutting-edge stimulus and measurement architectures, driving improvements in accuracy, energy efficiency, test time, and channel density to provide differentiated ATE capability.

Key Responsibilities

• Physical design lead of high-speed and high-performance analog, mixed-signal, and digital products and subsystems, including ADCs, DACs, PLLs, transceivers and receivers.
• Develop and integrate complex chip, subsystems in advanced CMOS FinFET technologies (16nm and below).
• Drive floorplan development at block, subsystem, and full-chip levels for designs of significant size and complexity.
• Collaborate with cross-functional teams—including DFT, clock, timing, power integrity, RTL, packaging, and analog designers—to ensure seamless integration and successful design closure.
• Define, implement, and continuously improve design methodologies, best practices, and automation workflows; promote knowledge sharing across teams.
• Lead physical verification processes including DRC, LVS, ERC, density checks, extraction, EM/IR analysis, and final signoff for tapeout.
• Develop project schedules, monitor progress, and ensure timely delivery of high-quality design milestones.
• Mentor and lead layout teams, fostering technical growth and ensuring project success.

Must Have Skills

• Technical Authority: Recognized technical expertise with influence throughout the organization and industry.
• Industry-Leading Expertise: Industry-leading expertise in IC layout, architecture design, and process optimization.
• Technical Collaboration Excellence: Capability to drive teams to their highest performance and create supportive and collaborative environments.
• Leadership Excellence: Demonstrated leadership in promoting teamwork and organizational effectiveness.

Preferred Education and Experience

• Bachelor's degree in Electrical/Computer Engineering or related field, or equivalent experience.
• 10+ years of full custom IC layout experience.
• Proficiency with Cadence Virtuoso, including strong VXL expertise.
• Deep understanding of LVS, DRC, antenna checks, and associated verification/debug methodologies.