Principal Hardware Systems Architect – Phased Array User Terminal

About the role

Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.

Core Responsibilities

• Own the end-to-end system block diagram, defining the hardware architecture, power distribution, data pathways, and grounding schemes for the user terminal.
• Evaluate and select critical components, including main SoCs, high-speed transceivers, memory, and peripherals, balancing performance, power efficiency, and bill-of-materials (BOM) cost.
• Act as the primary technical anchor connecting RF, Electrical, Mechanical, and Embedded Software teams to resolve multi-disciplinary interface challenges.
• Define the thermal dissipation strategy and high-voltage power delivery frameworks to support high-power beamforming states.
• Drive the hardware through the entire product lifecycle from initial architecture to global, high-volume mass manufacturing, partnering closely with contract manufacturers (CMs) and suppliers to optimize assembly yields, execute factory test strategies, and reduce unit costs.
• Establish the technical metrics, validation plans, and compliance strategies required for international wireless deployment (FCC Part 25/15, CE, ETSI).

Required Qualifications

• Master’s or Ph.D. in Electrical Engineering, Computer Engineering, or a highly related technical field.
• 10+ years of hardware engineering experience, with 4+ years acting as a Principal Systems Architect or Lead Architect delivering complex wireless, radar, or satellite communication products.
• Deep technical understanding of phased array antenna physics, digital beamforming architectures, high-speed digital buses (PCIe, SerDes, Ethernet), and RF front-ends.
• Strong background in defining layout constraints for massive, multi-layer mixed-signal boards, with a focus on strict signal/power integrity and EMI containment.
• Proven track record of architecting hardware intended for high-volume manufacturing, with deep knowledge of DFM/DFA constraints and supply chain trade-offs.

Preferred Qualifications

• Understanding of the interaction between RF-transparent radome polymers (like ASA or polycarbonates), hydrophobic coatings, and high-frequency microwave arrays.
• Previous engineering leadership role in a major Low Earth Orbit (LEO) or Geostationary (GEO) user terminal development program.

Pay

Base Pay Range For CA applicants is $230,773.00 - $323,081.85 WA applicants is $230,773.00 - $323,081.85 Other Site Ranges May Differ