Jobs · Engineering · California

Principal Firmware Engineer

Microsoft · Mountain View, CA · Yesterday
HybridEngineering$143k–$275k/yrFull-time

Responsibilities

  • Architect and develop SoC validation firmware and framework solution that enable multiple teams like design verification, silicon validation, firmware development and manufacturing teams to test IP and SoC features.
  • Enable debug features and integration and enabling of debug infrastructure.
  • Lead and drive root cause analysis of complex silicon issue debug spanning RTL and firmware.
  • Technically Lead a small team of experience and high motivated engineers in delivering products.
  • Architecture and development of specific IP level firmware libraries.
  • Define the boot flow sequences for initial bring up (Silicon initialization, memory training..) and leading early silicon bring up and enabling of manufacturing.
  • Collaborate with SoC architects to influence hardware features for usability, debuggability.
  • Collaborate with Silicon validation teams to root cause hardware and firmware issues.
  • Collaborate with cross Geo teams and drive program execution and deliver Products

Qualifications

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • Equivalent experience.

Other Requirements

  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.

Preferred Qualifications

  • Firmware architect with 15+ years of industry experience with 5+ years in defining and driving the SoC architecture particularly server class SoC’s.
  • Experience in SoC architecture particularly ARM based SoC micro architecture(ARM v8/v9), firmware design, design verification.
  • Silicon bringup and post silicon validation experience.
  • Experience in a few IP level silicon firmware library development (e.g PCIe, CXL, GIC, Interrupt controller, security processors, IOMMU , SMMU).
  • SoC debug expertise and experience and experience in using tools like JTAG ARMDS, Lauterbach TRACE32.
  • Experience in ATE environment and initial wafer bring up is desirable and a good knowledge of Platform, security (trust Zones etc)firmware.
  • Understanding of OS Linux Windows driver development is desirable.
  • Experience in leading a small team of engineers is desirable.

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