Principal Firmware Engineer
Cadence · Austin, TX · 2 wk ago
EngineeringFull-time
About the role
Be part of the Cadence DDR PHY IP Front End Design team responsible for developing firmware for DDR5 PHY using microcontrollers.
Responsibilities
- Develop firmware in C, typically involving bare-metal programming and low-level APIs on microcontrollers.
- Collaborate with hardware designers and memory subsystem architects to derive training algorithms and implement them.
- Collaborate with the verification team to deduce firmware-hardware co-verification plans.
- Develop and debug firmware in RTL-based hardware simulations (C + Verilog simulations).
- Develop and debug on silicon bring-up boards.
Requirements
- Good knowledge of the DDR5 JEDEC spec, including different DIMM configurations and specifications.
- Relevant experience in developing bare-metal firmware for high-speed SerDes or memory interface physical layer blocks.
- Proficiency in C programming for embedded software development and use of relevant IDEs.
- Comfortable debugging RTL simulations involving firmware and microcontroller subsystems.
- Good knowledge of Shell/Perl/Python/TCL scripting.
- Experience with verification EDA tools like simulators and waveform viewers.