Principal Engineer, SerDes AMS Design and Architecture

Key Responsibilities

• Architect the high-speed optical PHY of our next-generation product: TX path, RX path, clocking, and mixed-signal control loops against a system-level link budget shared with the photonics and laser teams.
• Set the AMS technical direction across our roadmap.
• Translate system-level specs into AMS subsystem architecture and block specs.
• Lead the silicon-success methodology: first-silicon-success expectations, debug discipline, characterization-to-production.
• Mentor AMS design engineers in design reviews and silicon debug.
• Drive co-design across the EIC/PIC boundary.
• Represent the AMS organization in cross-functional architecture reviews, customer technical engagements, and foundry/EDA partner discussions.

Required Qualifications

• B.S. in Electrical Engineering
• 12+ years of industry experience in analog/mixed signal design
• Track record of production tapeouts in advanced FinFET CMOS nodes
• Design experience with high speed and high precision analog blocks such as PLLs, clock distribution and multi-phase generation, TX/RX analog front ends, data converters, and references/regulators
• Fluent with Cadence design environment and mixed-signal simulation (ADE, Layout, Spectre)
• Experience driving architectural tradeoff analysis using link budgeting tools
• Experience designing in FinFet CMOS (7nm or below) at data rates of at least 50Gb/s and/or RF circuits operating at 25GHz or above

Preferred Qualifications

• M.S. or Ph.D in Electrical Engineering
• Direct experience with optical link components, such as TIAs, high swing drivers, MRMs, and thermal control loops
• Experience designing for chiplets, 3D stacked, or other advanced packaging applications
• Previous experience in bringing a new AMS architectural concept from idea to production silicon
• Demonstrated mentorship of junior designers