Jobs · Engineering · California

Principal Engineer, Hardware Design (AI2518)

SiMa.ai · San Jose, CA · 1 wk ago
Engineering$204k–$316k/yrFull-time

About the role

The ideal candidate will own complex design blocks from microarchitecture and RTL implementation through verification support and silicon bring-up. This position offers the opportunity to shape and influence the design architecture and methodology of SiMa's silicon in a fast-paced startup environment.

Responsibilities

  • Own microarchitecture definition and RTL implementation of complex blocks from concept through silicon.
  • Drive ground-up block design, owning each block from specification and microarchitecture to RTL, integration, and bring-up.
  • Develop high-quality, synthesizable RTL (Verilog/SystemVerilog), including custom logic, protocol adaptation, and data-path optimizations.
  • Define block-level interfaces, microarchitectural trade-offs, and design specifications.
  • Collaborate with verification, physical design, architecture, and firmware teams to ensure each block meets functional, timing, power, and area targets.
  • Drive block-level synthesis, timing closure, and DFT readiness.

Requirements

  • Master's degree in Electrical Engineering, Computer Engineering, or related field.
  • 10+ years of experience in ASIC design, with a strong focus on block-level RTL design and silicon development.
  • Proven track record of ground-up block design, taking blocks from microarchitecture and RTL through to working silicon.
  • Expert-level RTL design skills (Verilog/SystemVerilog), with hands-on experience in synthesis, timing closure, and DFT concepts.
  • Strong understanding of microarchitecture trade-offs, data-path and control logic design, and block-level optimization for power, performance, and area.
  • Experience with post-silicon validation and debug, using lab equipment such as oscilloscopes, logic analyzers, and protocol analyzers.
  • Nice to have: Experience designing hardware for machine learning / AI accelerators, experience integrating blocks into larger SoCs, experience implementing or integrating high-speed interfaces such as PCIe and UCIe, exposure to firmware or driver development for high-speed interfaces.

Qualifications

Must have a full-time, on-site presence in our San Jose, CA office.

Skills

Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills.

Benefits

The annual salary for this position ranges from $203,800 - $315,900. The actual annual salary offered will depend on several factors, including - among others - job-related skills, experience, technical expertise, qualifications, work location, and business needs.

Pay

The annual salary for this position ranges from $203,800 - $315,900.

Schedule

This position requires a full-time, on-site presence in our San Jose, CA office.

Similar jobs