Principal Engineer-Digital Signal Processing FPGA Designer

About the role

Located at 50 Apple Hill Dr, Assabet Bldg, Tewksbury, MA (with possible work at the Marlborough, MA site), the Radar Digital Products Department in the Hardware Engineering Directorate at Raytheon is seeking an experienced Principal Electrical Engineer with strong DSP FPGA design skills. At RTX, the world's largest aerospace and defense company, 185,000 employees unite to solve complex problems, delivering solutions that defend freedoms and deter aggression. The role involves developing and implementing DSP algorithms and FPGA‑based designs for interface communications, controls, and data processing applications, supporting the full product lifecycle from concept to maintenance.

Responsibilities

• Work with a team to determine the technical approach or solution to meet system level requirements to successfully complete FPGA‑based designs on time and on budget
• May lead small teams and mentor junior engineers
• Demonstrate self‑motivation, with little supervision required
• Design and deliver production quality FPGA releases from initial proof of concept up to production
• Work cooperatively with systems, hardware, software engineers, and program management to ensure product success
• Demonstrate the ability to architect FPGA‑based systems to determine parts, interfaces, and Concept of Operations (CONOPS)
• Translate system level requirements into FPGA requirements
• Design and code in VHDL for reliability and maintainability
• Verify designs utilizing self‑checking techniques with directed and constrained random tests, while tracking functional and code coverage
• Create complete documentation including requirements, verification plan, and user’s guides
• Support internal and external technical reviews

Requirements

• U.S. citizenship is required (only U.S. citizens are eligible for a security clearance)
• Active and transferable U.S. government‑issued security clearance is required prior to start date; ability to obtain an interim U.S. government‑issued security clearance is required prior to start date
• Security clearance type: DoD Clearance: Secret

Qualifications

Must have

• Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and a minimum of 8 years of prior relevant experience
• Experience implementing DSP functions (e.g., FFTs, FIR filters) in FPGAs using VHDL/Verilog and VHDL simulation tools
• Experience designing filters in MATLAB
• Experience with high‑speed interfaces such as 100 GbE, PCIe, DDR
• Experience with Timing Closure and utilizing ChipScope / Signal Tap