Principal Engineer, Digital Design Engineer (AI/ML)

Key Responsibilities

• Drive adoption of AI/ML methodologies to optimize synthesis, timing closure, power estimation, and design space exploration
• Define and lead digital architecture for complex SoCs and mixed-signal ICs, including control logic, digital interfaces, and on-chip processing
• Own the synthesis-to-signoff flow including synthesis with timing and placement constraints (Genus), STA and power analysis (Tempus), and logical equivalence checking (Conformal)
• Lead architecture and design reviews, assessing trade-offs across timing, area, power, and testability
• Influence design flows, IP reuse strategies, and product roadmaps across multiple projects
• Collaborate with analog design teams to define and integrate digital-analog interfaces and control architectures

Required Skills And Experience

• MSEE or MSCE with 10+ years of digital IC design experience, or PhD with 8+ years (BSEE/BSCE with equivalent depth considered)
• Expert-level RTL design in Verilog/SystemVerilog with proven track record of complex digital subsystem delivery
• Track record of leading digital designs from architecture through tape-out, silicon validation, and production release
• Strong scripting skills (Python, Tcl, shell) with experience applying AI/ML techniques to enhance productivity
• Deep knowledge of synthesis, static timing analysis, DFT (scan, ATPG, BIST), and clock domain crossing methodologies
• Proficiency with Cadence digital design tools: Genus, Innovus, Tempus, Conformal
• Excellent presentation, technical writing, and communication skills

Preferred Qualifications

• Working knowledge of place-and-route (Innovus), floorplanning, and physical-aware design techniques
• Experience with low-power design techniques including multi-voltage domains, power gating, and UPF
• Familiarity with digital interfaces (I2C, SPI, UART) and mixed-signal SoC integration
• Strong analytical and problem-solving abilities
• Ability to work effectively in a collaborative team environment