Principal Digital Design Engineer (ASIC)

About the role

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible.

Key Responsibilities

• Develop and maintain system-level models (e.g., in SystemVerilog, or MATLAB) to analyze architectural trade-offs, verify system behavior, and inform hardware/software partitioning.
• Own the architecture, micro-architecture, and RTL design of complex digital blocks and/or subsystems (such as signal processing functions, control, or processor subsystems) for mixed signal ICs.
• Collaborate closely with multi-location teams such as system architects, analog designers, DV, physical design, product engineering, applications, and firmware teams during architecture, design, evaluation, and release phases.
• Lead design reviews, participate in specifications, and ensure alignment with broader project goals.
• Perform RTL coding (Verilog and SystemVerilog), synthesis, and lint/CDC analysis; drive designs to timing closure and area/power targets.
• Develop and execute verification plans in collaboration with DV, including functional coverage and support for simulation/debug.
• Analyze and resolve design, timing, and functional issues across the full digital development flow.
• Contribute to top-level integration, including interface definition, constraint development, and support for physical implementation for functional and DFT modes.
• Mentor and guide junior engineers, sharing expertise and promoting best practices.
• Author and maintain clear documentation, user guides, and design collateral.
• Stay current with industry trends and identify opportunities for process or technology improvement.
• Perform silicon lab evaluation and debug.
• Use Python applications to develop tests on evaluation platforms.

Must Have Skills

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 10+ years of experience in digital design for ASIC/SoC, with track record of successful tapeouts.
• Strong understanding of ASIC Design flow.
• Expertise in RTL design (SystemVerilog), logic synthesis, and digital verification methodologies with Cadence tools.
• Experience with modeling and scripting (Matlab, TCL, Python) for design automation.
• Strong understanding of digital design flows, timing analysis, and constraints.
• Experience collaborating across functions (DV, PD, systems, analog/mixed-signal).
• Excellent communication and documentation skills.
• Demonstrated ability to lead technical projects or major design subsystems.
• Strong understanding of business context and ability to align technical strategy with business goals.