Principal Design Verification Engineer (Silicon Engineering)
About the role
We are seeking a motivated, proactive, and intellectually curious Principal Design Verification Engineer to work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable, or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
Responsibilities
- Responsible for digital ASIC and/or FPGA verification at block and system level
- Lead and execute verification test plan, development, and milestones from beginning to end
- Contribute towards pre-silicon verification, chip bring-up, and post-silicon validation
- Be a hands-on self-starter who can execute the steps required to fully verify complex digital designs
Requirements
- Bachelor’s degree in electrical engineering, computer engineering, or computer science
- 10+ years of experience with design verification and test bench development
- Ability to work extended hours and weekends as needed to meet critical milestones
- To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C.1157, or (iv) Asylee under 8 U.S.C.1158, or be eligible to obtain the required authorizations from the U.S. Department of State
Skills
- Advanced degree in electrical engineering or computer engineering
- Experience with verification methodologies such as UVM/OVM/VMM
- Strong object-oriented programming knowledge
- Strong problem-solving and coding skills
- Experience in constrained random verification
- Expertise in developing test plans, implementing coverage models, and analyzing results
- Experience with scripting languages, e.g., Python for automation
- RTL design, chip bring-up, and post-silicon validation experience
- Ability to work in a dynamic environment with changing needs and requirements
Benefits
- Comprehensive medical, vision, and dental coverage
- Access to a 401(k) retirement plan
- Short & long-term disability insurance
- Life insurance
- Paid parental leave
- Various discounts and perks
- 3 weeks of paid vacation & eligibility for 10 or more paid holidays per year
- 5 days of sick leave per year (exempt employees)
- Long-term incentives in the form of company stock, stock options, or long-term cash awards
- Potential discretionary bonuses
- Ability to purchase additional stock at a discount through an Employee Stock Purchase Plan
Pay
Design Verification Engineer / Principal: $210,000.00 - $335,000.00 per year. Your actual level and base salary will be determined on a case-by-case basis and may vary based on job-related knowledge, skills, education, and experience. Base salary is just one part of your total rewards package at SpaceX.