Physical Verification Engineer

About the role

The Aerospace, Defense & Government (ADG) Senior Physical Verification Application Engineer provides specialized technical support to Intel Foundry Services customers on layout verification and parasitic extraction. This critical role ensures successful customer tape-outs by resolving complex physical design challenges, driving quality improvements in design kits, and delivering comprehensive technical guidance on advanced verification methodologies.

Responsibilities

• Provide comprehensive technical support to Intel Foundry Services customers on layout verification and parasitic extraction challenges
• Collaborate with internal Intel teams and external stakeholders including foundry customers' design teams, IP providers, and EDA vendors on physical and layout design rules and extraction issue resolution
• Resolve complex verification challenges across advanced CMOS processes and ensure successful customer design implementations

Qualifications

• US Citizenship required
• Ability to obtain a US Government Security Clearance
• Bachelor's degree in Electrical / Computer Engineering, Computer Science, or in a STEM related field of study
• 3+ years of experience with advanced CMOS processes (22nm and below)
• 3+ years of combined experience in layout verification and parasitic extraction
• 3+ years of experience in one or more of the following scripting languages (Python, Perl, Tcl, and/or shell scripting.)