PhD Research Intern, Architecture – 2027

About the role

The NVIDIA Architecture Research Group is seeking an intern to help define the future of GPU and data-center computing. Our research spans GPU microarchitecture, memory systems and memory models, large-scale data-center hardware, emerging accelerators, and the architecture implications of new workloads in AI, scientific computing, robotics, and other rapidly evolving domains. Are you excited about exploring foundational research questions, developing new architectural ideas, and helping translate those ideas into future NVIDIA systems? In this position, you will apply your knowledge of computer architecture, parallel computing, compilers, runtime systems, and workloads to explore new hardware and hardware–software co-design opportunities. You will work with researchers and product architects to formulate research questions, develop and evaluate architecture concepts, and build the models, simulators, prototypes, and experimental infrastructure needed to test them. Projects may range from mechanisms within a GPU to memory consistency and programmability, rack- and data-center-scale architectures, and specialized hardware for emerging applications. You should have a strong foundation in computer architecture and parallel systems, an ability to work across hardware and software boundaries, and experience with some combination of architecture modeling, simulation, workload analysis, compilers, runtime systems, or CPU/GPU programming. You should also be comfortable building robust research prototypes and communicating the insights produced by your work. NVIDIA pioneered programmable GPUs and CUDA and continues to shape the future of accelerated computing. This position offers an opportunity to conduct ambitious research and have a direct impact on future products.

Responsibilities

• Investigate new architecture concepts for future GPUs, memory systems, accelerators, and data-center-scale computing platforms.
• Study emerging workloads and identify the architectural bottlenecks and opportunities they create.
• Explore hardware–software co-design across architecture, compilers, runtime systems, programming models, and applications.
• Develop models, simulators, prototypes, and experimental tools to evaluate new architecture ideas.
• Research new approaches to memory hierarchy, coherence, consistency, data movement, and system-level programmability.
• Collaborate with