New College Grad - Design Engineer, NVEG

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

About the role

The Non-Volatile Engineering Group (NVEG) at Micron contributes to the development of memory products that are best-in-class in terms of die size, performance, reliability, and power. Our NVEG organization is dedicated to advancing non-volatile memory technologies such as NAND. This Design Engineer position will contribute to the development of new memory products by assisting with the overall design, layout, and optimization of datapath circuits for NAND flash memory. This person will help make strategic decisions on major datapath architectural changes influenced by new design specs such as higher speed/lower power. They will assess pros and cons of new architecture and contribute to its implementation. The role will collaborate with other engineers on technical datapath design projects, participating in the design planning, layout, and validation activities according to project timelines.

Responsibilities

• Manage major IO/datapath block (e.g. input receiver, serializer, deserializer, clock distribution, equalizer, ZQ calibration, ONFI training features, wave pipeline) to meet specifications and verify functionality and performance
• Model parasitics and review layout regularly and find opportunities for improving area/power
• Communicate with project integration and other functional teams on specifications of major block interfaces
• Communicate with PE to drive silicon experiments and propose and implement fixes for yield improvement and silicon debugging
• Document and review final results with senior engineers and project partners
• Leverage AI and automation to facilitate workflow acceleration and ongoing research

Requirements

• A completed BS or MS in Electrical Engineering and 0-2 years of full-time professional experience in semiconductor manufacturing
• Understanding of physical design flows, high-speed IO circuit performance, power and area optimization, and chip architecture/floorplan
• Demonstrated ability to be an active participant in complex design projects and effectively communicate progress and outcomes

Preferred Qualifications

• PhD in Electrical Engineering and/or a focus on Microelectronics
• Hands-on experience in using AI to improve quality of design and efficiency
• Coursework in/understanding of CMOS BSIM model, CMOS targets for high speed IO operation, and CMOS device reliability

Pay

The US base salary range for this full-time position is $83,000.00 - $198,000.00 a year. Additional compensation may include benefits, bonuses, and equity. Salary ranges are determined by role, level, and location. Individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure, and relevant education or training.

Benefits

• A choice of medical, dental, and vision plans
• Income protection programs if unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program and paid holidays