MOSIS 2.0 Scientist

Key Responsibilities

• Serve as technical lead, PI, or co-PI on awarded programs; own execution plans, milestones, deliverables, sponsor reporting, and program reviews.
• Translate statements of work into detailed technical plans, schedules, and resource allocations across the team.
• Track progress against milestones, identify and retire technical and schedule risks early, and keep sponsors informed through regular reporting and reviews.
• Direct experimental work across device design, mask layout, tapeouts, fabrication runs, and electrical characterization.
• Lead semiconductor process development and integration in cleanroom and foundry environments, including translating research processes into manufacturable flows.
• Deliver PDK and design-enablement work products: device compact modeling, DRC/LVS deck development, parameterized cells, and EDA flow validation in collaboration with foundries and design customers.
• Guide device design and modeling across CMOS and compound semiconductor (GaN/GaAs) technologies, spanning RF, mixed-signal, and emerging device applications.

Team and Stakeholder Leadership

• Build, manage, and mentor a team of research scientists and engineers; allocate staff across concurrent programs and coordinate with USC faculty, students, and MOSIS operations staff.
• Interface with foundry partners, government sponsors, defense industrial base customers, and CA DREAMS hub partners; represent MOSIS 2.0 at program reviews, working groups, and conferences.
• Contribute technical content to new proposals and program plans as needed.

Required Qualifications

• PhD in Electrical Engineering, Materials Science, Applied Physics, or a closely related field.
• 3+ years of post-PhD experience (industry, national lab, or academic research) in semiconductor device technology.
• Demonstrated track record executing sponsored research programs.
• Hands-on expertise in semiconductor fabrication and process integration (cleanroom experience required).
• Strong background in semiconductor device physics, design, and characterization.
• Excellent written and verbal communication skills, including technical writing for sponsor reports and program reviews.

Preferred Qualifications

• Working knowledge of PDK components and EDA flows (e.g., Cadence/Synopsys/KLayout environments; DRC/LVS; compact models such as BSIM or ASM-HEMT).
• Experience with DoD-sponsored research programs (e.g., DARPA, ONR, Microelectronics Commons) and their reporting/security requirements.
• Familiarity with compound semiconductor technologies (GaN, GaAs, InP), photonics, and/or RF/mm-wave applications.
• Experience contributing to or leading research proposals.