ML Architect, Hardware Software Co-Design (All Levels)

About the role

We are looking for an Engineer or Research Scientist with deep expertise in quantized deep learning models for hardware acceleration in autonomous systems. In this cross-disciplinary role, you will bridge perception model design and hardware-aware deployment, enabling efficient execution of high-performance perception algorithms across embedded compute platforms.

Responsibilities

• Research state of the art perception models in collaboration with the ADAS SW teams
• Lead the development of optimizations for mapping quantized perception models (e.g., CNNs, Transformers, LLMs) to embedded and heterogeneous hardware platforms
• Design and implement hardware-aware optimizations, including quantization strategies, model compression, memory-efficient representations, and operator fusion, targeted to custom accelerators
• Collaborate with hardware teams to co-optimize model architecture and compute pipeline under real-time constraints (latency, throughput, power)
• Benchmark and analyze system performance across platforms and iterate to achieve optimal deployment efficiency
• Partner with perception, systems, and autonomy teams to align model optimization efforts with hardware roadmap and real-world autonomy requirements

Qualifications

• Ph.D. or M.S. in Computer Engineering, Electrical Engineering, Computer Science, or related field with a focus on ML compilers, embedded systems, or hardware-aware AI
• Hands-on experience with quantized model deployment, ML design stacks, and code generation for embedded or heterogeneous compute systems
• Strong understanding of computer vision models (e.g., object detection, segmentation) and their optimization for edge inference
• Proficiency in deep learning frameworks (e.g., PyTorch, TensorFlow) and their low-level IRs or export formats (e.g., ONNX)
• Solid programming skills in C++, Python
• Familiarity with CUDA/OpenCL (or other accelerator programming models)

Preferred Qualifications

• Prior experience working with hardware-software co-design, especially for autonomous or robotics platforms
• Deep knowledge of numerical precision trade-offs, quantization-aware training (QAT), and dynamic/static quantization flows
• Familiarity with embedded real-time constraints and hardware profiling/debugging tools
• Familiarity with rearchitecting models to best suit hardware capabilities
• Publication record in top-tier ML/Systems conferences (e.g., MLSys, NeurIPS, DAC, ICCAD)

Pay

Salary Range: The salary range for this role is $206,000 - $258,000. for San Francisco Bay Area based applicants. This is the lowest to highest salary we in good faith believe we would pay for this role at the time of this posting. An employee’s position within the salary range will be based on several factors including, but not limited to, specific competencies, relevant education, qualifications, certifications, experience, skills, geographic location, shift, and organizational needs.

Benefits

Rivian offers a comprehensive package of benefits for full-time and part-time employees, their spouse or domestic partner, and children up to age 26, including but not limited to paid vacation, paid sick leave, and a competitive portfolio of insurance benefits including life, medical, dental, vision, short-term disability insurance, and long-term disability insurance to eligible employees. You may also have the opportunity to participate in Rivian’s 401(k) Plan and Employee Stock Purchase Program if you meet certain eligibility requirements.

Equal Opportunity

Rivian is an equal opportunity employer and complies with all applicable federal, state, and local fair employment practices laws. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, ancestry, sex, sexual orientation, gender, gender expression, gender identity, genetic information or characteristics, physical or mental disability, marital/domestic partner status, age, military/veteran status, medical condition, or any other characteristic protected by law.