Machine Learning Engineer

About the Role

We are seeking a Machine Learning Engineer to help drive the development, optimization, and deployment of Altera’s FPGA Compiler. In this role, you will work at the intersection of machine learning and compiler/toolchain development, enabling customers to achieve breakthrough performance and efficiency on programmable logic. You will collaborate closely with hardware architects, software engineers, and IP developers to design ML models, optimize inference pipelines, and contribute to the evolution of Altera’s FPGA Compiler.

Responsibilities

• Develop, optimize, and deploy advanced machine learning technologies to enhance FPGA compiler performance, focusing on timing closure, resource utilization, and power efficiency.
• Evaluate and integrate emerging ML models (e.g., graph neural networks, reinforcement learning) and frameworks (e.g., PyTorch, TensorFlow) for compiler optimization tasks like placement, routing, and logic synthesis.
• Build robust tools, scripts, and CI/CD workflows to automate model conversion, quantization, pruning, and deployment within the FPGA design flow, ensuring compatibility with EDA tools like Quartus.
• Collaborate with customers, FPGA architects, and internal engineering teams to gather ML requirements, define success metrics, and deliver tailored, production-ready solutions.
• Design and execute comprehensive benchmarks to measure ML-optimized compiler performance across diverse FPGA families (e.g., Agilex, Stratix), analyzing metrics such as compile time, QoR, and scalability.

Requirements

• Bachelor’s Degree or higher in Computer Science, Electrical Engineering, or a related field.
• 10+ years of experience in machine learning development, model optimization, or ML systems engineering.
• Experience with C++ and Python in production or research environments.

Qualifications

• Experience with Agile methodologies, GitHub Copilot or similar AI coding assistants, and high-performance computing environments.
• Familiarity with edge AI inference on FPGAs and neuro-symbolic AI techniques.
• Strong communication skills for cross-functional collaboration and presenting results at conferences like DAC or FPGA World.

Pay

The pay range below is for Bay Area, California only. Actual salary may vary based on job location, job-related knowledge, skills, experiences, and trainings. We also offer incentive opportunities that reward employees based on individual and company performance.

$200.4K - $290.1K USD

Schedule

Shift 1 (United States of America)

Applicants must be eligible for any required U.S. export authorizations. We use artificial intelligence to screen, assess, or select applicants for the position.