HSIO Functional and Power Management Engineer

What You’ll Be Doing

• Contribute to the design of the next generation of high-speed IOs, including NVLink and NVLink-C2C.
• Responsible for IO power optimizations and continuing to push energy efficiency.
• Ensure interoperability with connected devices and system components in complex interconnect topologies.
• Deep dive into technically challenging HSIO bugs and help drive debug efforts across various teams.
• Work closely and proactively with other engineering teams such as system architects, mixed signal and design, DGX, software/firmware, HW/SW QA, operations, and AE teams to drive design, development, debug, and release of next-generation products.

What We Need To See

• BS or MS degree in EE/CE or equivalent experience
• Minimum 10 years working on HSIO with the following capacity - power management, use case analysis, perf/power modeling, bringup, and/or debug.
• Ownership and working experience in some of the following areas:
• System-level and interconnect power management optimizations
• Silicon and platform-level power modeling for active/idle use cases
• Understanding of firmware/driver structures and their interaction with HW
• Track record of influence, leadership, and collaboration across multiple teams towards a unified goal.
• Strong EE fundamentals, knowledgeable in computer architecture, high-speed interfaces, timing analysis, process variations, statistical error rates, and power analysis.

Pay

Competitive salaries and a generous benefits package are offered. The base salary range is $168,000 - $264,500 for Level 4, and $196,000 - $310,500 for Level 5. Equity and benefits are also provided.

Schedule

The posting is for an existing vacancy. Applications will be accepted until August 29, 2026.