High Speed Mixed Signal Circuit Design Engineer

About the role

The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise. The Optical Networks division combines cutting-edge technology with proven leadership to redefine the future of connectivity.

Responsibilities

• Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs;
• Create the layout floor plans to optimize the overall performance;
• Supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary;
• Explore the trade-offs of the different topologies and propose the best solution to achieve or exceed the requirements in terms of power/area/linearity/bandwidth, etc.
• Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality;
• Support and comply with the team’s design methodologies and release flows.

Requirements

• Mandatory Knowledge/Skills/Abilities:
• Extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc.
• Proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies.
• Experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production.
• Adequate understanding in CMOS analog / mixed signal design methodologies and circuit analysis.
• Adequate understanding of device physics and the impacts of layout effects.
• Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS.
• Collaborative with other local or remote team members in a fast-paced professional environment.
• Preferred Knowledge/Skills/Abilities:
• Fluent in verbal and written communications.
• Independently resolves issues and conquer design challenges.
• Self-motivated and detail-oriented.
• Knowledge of (optical) communication theories and Matlab coding.

Qualifications

• M.S. in E.E. with 8+ years’ experience.

Skills

• Extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc.
• Proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies.
• Experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production.
• Adequate understanding in CMOS analog / mixed signal design methodologies and circuit analysis.
• Adequate understanding of device physics and the impacts of layout effects.
• Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS.
• Collaborative with other local or remote team members in a fast-paced professional environment.

Benefits

• Corporate Retirement Savings Plan
• Health and dental benefits
• Short-term disability, and long-term disability
• Life insurance, and AD&D – Company paid 2x base pay
• Optional or Supplemental life and AD&D insurance (Employee/Spouse/Child)
• Paid time off for holidays and Vacation
• Employee Stock Purchase Plan
• Tuition Assistance Plan
• Adoption assistance
• Employee Assistance Program/Work Life Resource Program

Pay

Nokia maintains broad annual base salary ranges for its roles in order to account for variations in knowledge, skills, experience and market conditions, and with consideration to internal peer equity.

Schedule

US/Canada Nokia offers a comprehensive benefits package that includes but is not limited to: