Hardware System Architecture Fellow - AI & Data Center Networking

Key Responsibilities

• Define system-level architecture for AI scale-out and scale-up networking platforms, translating product and business requirements into robust, scalable hardware solutions.
• Drive architectural decisions across chip-to-system boundaries, including interconnect topology, board and system partitioning, power delivery strategy, signal integrity constraints, and platform extensibility.
• Lead early-phase system feasibility analysis, proactively identifying risks, trade-offs, and technology inflection points.
• Cross-domain Technical Leadership:
• Serve as the primary technical authority for system-level challenges spanning ASIC, packaging, board design, optics, power, thermal, and mechanical integration.
• Resolve the most complex bring-up, validation, and field issues, synthesizing cross-domain data to drive root-cause closure and architectural improvements.
• Ensure architectural intent is preserved through design, validation, and production ramp.

Qualifications

• Deep expertise in system-level hardware architecture for networking, AI infrastructure, or data center platforms.
• Proven track record of architecting and delivering complex hardware systems across multiple product generations.
• Broad understanding of board design, power delivery, signal integrity, system validation, and high-speed bring-up.
• Demonstrated ability to solve ambiguous, cross-domain problems with significant technical and business impact.

Preferred Experience

• Experience with AI scale-out networking systems, including AI-NICs, DPUs, or high-bandwidth switching platforms.
• Familiarity with advanced interconnect and packaging technologies and their system-level implications.
• Demonstrated enterprise-level technical influence (e.g., architecture ownership, critical platform delivery, or Fellow trajectory).
• Recognized industry or academic thought leadership, with publications, patents, or standards contributions.