Hardware Engineer

About the role

Broadcom's Central Engineering Design Correlation team is seeking an energetic and self‑driven professional to support silicon technology evaluation in advanced process nodes for IP and product designs. The mission includes assessing foundry technology offerings, helping define new technology platforms for IP and product designs, performing risk assessment, and providing Broadcom’s design communities with insights into design and process‑technology interactions, especially during co‑development in advanced process nodes. The role offers participation in new technology platform definition, PPAC (power performance area cost) assessment and benchmarking, test structure design, silicon characterization, and model‑to‑silicon correlation in the most advanced foundry technology nodes. You will work closely with experts in CMOS process technology, device & modeling, process and device reliability, digital & analog IP design, design sign‑off flow for timing and power, CAD & EDA tools, and chip designers from various product lines. Primary duties involve assessing technology offerings and capabilities to meet design needs, driving alignment with IP/product requirements, and participating with foundry and internal teams on new technology enablement to ensure robustness of technology platforms. The position is located in Broadcom’s Irvine, California facility.

Responsibilities

• Support IP and Chip teams with technology evaluation including reliability and design enablement.
• Responsibilities as part of technology evaluation will involve test structure layout, verification, extraction, simulation, and silicon evaluation.
• Job scope includes:
  • cross‑functional quality assurance of designs and tape‑outs
  • EDA & RCX tool quality and predictability
  • custom device infrastructure readiness & robustness
• Engage in collaborative team projects involving design, platform technology, and operations teams and foundry partners.

Qualifications

• Degree in Electrical Engineering, Materials Engineering, Engineering Physics or related field with 8+ years of related experience after BS or 6+ years after MS or 3+ years after PhD, with recent work in advanced FINFET (or GAA) nodes.
• Strong background in advanced CMOS technology (FEOL, MEOL, BEOL) including understanding of design‑technology interactions.
• Proficient in interacting with design teams and foundry partners.
• Familiarity with analog and digital design flows and CAD tools.
• Hands‑on experience with device/circuit level test structure designs, verification (DRC, LVS), extraction, SPICE simulation, silicon characterization (DC/AC/RF) and data analysis.
• Extremely detail oriented with strong analytical, communication, and multitasking skills.
• Mix of hands‑on and project management skills.

Pay

The annual base salary range for this position is $108,000 - $172,800. As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Benefits

• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company paid holidays
• Paid sick leave and vacation time
• Paid Family Leave and other leaves of absence in accordance with applicable laws