Hardware Digital Engineer

About the role

Product R&D has an immediate opening for an entry-level Digital Hardware Engineer within our talented hardware design team in Austin, TX.

Responsibilities

• Collaborate with multi-disciplinary hardware engineering teams to develop test and measurement products.
• Write and debug Verilog/SystemVerilog RTL for functional blocks, including high-performance and mixed-signal designs.
• Contribute to Design Verification by developing assertions, checkers, and test plans; perform equivalence checking and linting.
• Develop register maps and generate documentation to ensure clear design intent to the broader project team.
• Support silicon bring-up, diagnostics, and post-silicon debug.
• Develop and execute plans for prototype hardware bring-up and board level validation.

Requirements

• Bachelor's degree in Electrical, Computer, or Software Engineering, or a related discipline.
• 3+ years of relevant experience.
• Proven knowledge of: Programmable logic design with VHDL, Verilog, or SystemVerilog Front-end design tools.
• Proven knowledge of Computer architectures and interfaces.
• Located within a commutable distance to the NI Corporate headquarters in Austin, TX, or willing to relocate.

Qualifications

• Authorized to work in the United States without sponsorship now and in the future.
• Individuals with temporary visas such as E, F-1 (including those with OPT or CPT), H-1, H-2, L-1, B, J or TN, or who need sponsorship for work authorization now or in the future, are not eligible for hire.

Pay

Commensurate with experience.

Schedule

N/A

Benefits

N/A

Skills

• Demonstrated ability to: Apply diagnostic insight to identify technical problems, propose viable options, and apply technical solutions.
• Quickly learn applicable technologies, systems, and products.
• Take initiative, be a self-starter, and work independently.
• Work and communicate effectively in a team development environment.
• Persistently drive tasks and projects to successful completion.
• Take ownership of goals and schedules and manage time well.
• Fundamental knowledge of programming languages (e.g. python, C, LabVIEW).
• Fundamental knowledge of analog circuit design.
• Using GenAI tools (e.g., large language models, AI-assisted code generation) to design, validate, and optimize SystemVerilog RTL code.
• Familiar with common benchtop instruments such as oscilloscopes, DMMs, function generators, and power supplies.
• Familiar with Xilinx, Intel, or Lattice FPGAs and CPLDs, as well as their design tools.