Hardware Design Integrity Engineer

About the role

Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge. Our Hardware Engineering team develops high-speed networking and Ethernet products used in enterprise campuses, hyperscaler datacenters, and bleeding-edge AI clusters. You will work closely with cross-functional teams including software, product management, and manufacturing to innovate on system architectures, high-speed PCB designs, and signal integrity.

Responsibilities

• Deep dive into various aspects of any existing hardware design — CPU/ASIC, power, signal integrity, clocking, PCIe, optics, fab, components.
• Work closely with software and customer teams on high-pressure escalations from the field, including reading logs, identifying the bug, determining the best fix with minimal interruption, delivering the final solution, determining if other systems are susceptible, and implementing measures to prevent recurrence.
• Write scripts to look for specific information in logs or to capture information in live debug sessions.
• Work closely with the hardware design team, and be able to make firmware, schematic, BOM, and fab changes as needed.
• Perform lab measurements and debug.
• Work closely with component, failure analysis, and ODM teams to identify component-level or third-party root cause analyses and fixes.
• Identify test escapes; work with the design validation team to examine current test limitations and develop new tests.
• Write and present root cause analyses for executives and customers.

Qualifications

• BSEE or MSEE
• 5+ years of relevant experience in hardware engineering
• Experience debugging networking hardware
• Experience with proper design of 20+ layer count boards featuring 50G+ signals
• Experience debugging and validating multi-phase DC/DC converters for high current, high transient loads
• Experience with design and debug of high-speed interfaces (DDR, PCIe) as well as low-speed signals (I2C, SPI)
• Familiarity with signal integrity and power integrity concepts and tools, such as impedance, PDNs, Bode plots, PCIe analyzers, TDRs, VNAs
• FPGA design using Verilog

Pay

The new hire base pay for this role has a salary range of $130,000 to $225,000. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. Certain roles may also be eligible for discretionary Arista bonuses and equity. Employees in Sales roles are eligible to participate in Arista’s Sales Incentive Plan, which pays commissions calculated as a percentage of eligible sales.

Benefits

US-based employees are entitled to benefits including medical, dental, vision, wellbeing, tax savings, and income protection. The recruiting team can share more details during the hiring process specific to the role and location.