FPGA Engineer (New Hire Bonus Eligible)

About the role

General Dynamics Mission Systems has an opening for an FPGA Engineer in Bloomington, MN.

Responsibilities

• Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
• Determines architecture, system simulation and detailed design approach
• Defines module interfaces and all aspects of device design and simulation
• Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
• Creates test and simulation plans that establish functional criteria
• Verifies test results and analyzes performance
• May also review vendor capabilities, foundry technologies, device libraries and simulation tools

Qualifications

• Requires a Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field
• Also requires 2+ years of job-related experience, or a Master's degree and 6 months of job-related experience
• Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.

Skills

• Solid proficiency and able to perform all responsibilities associated with the position
• Grasps and applies new information quickly
• Solid ability to handle more complex assignments
• Shows initiative on assignments, exercises independent judgment and professionally executes projects with little direction
• Solid use of ASIC/FPGA concepts, principles, and theories
• Solid understanding of ASIC/FPGA engineering processes
• Keeps abreast of technology trends in ASIC/FPGA
• Solid awareness of business objectives and Engineering’s role in achieving
• Solid knowledge in Microsoft Office applications
• Solid knowledge in ASIC/FPGA design tools
• Solid written and verbal communications skills
• Ability to think creatively
• Ability to multi-task
• Solid skill in communicating issues, impacts, and corrective actions
• Solid understanding of basic earned value, Cost Account Management (CAM), and Variance Report generation
• Solid ability to recognize and clearly report information relevant to sound ASIC/FPGA design
• Solid development experience with Microchip Polarfire FPGAs
• Solid experience utilizing UVM (Universal Verification Methodology) for FPGA verification
• Solid experience developing in SystemVerilog

Pay

Target salary range: USD $117,276.00/Yr. - USD $126,734.00/Yr. This estimate represents the typical salary range for this position based on experience and other factors (geographic location, etc.). Actual pay may vary.

Schedule

This position is 100% On-site while on-site, you will be working at the Bloomington, MN GDMS facility.