FPGA Engineer (eInfochips Inc)

About the role

As an FPGA Engineer at eInfochips, you will develop C and C++ based test content, low-level drivers, and custom firmware at the subsystem and SoC levels, including self-checking tests for embedded processors. You will extend the compile and build flow to support custom Firmware-style tests and serve as the technical owner for the team's FPGA prototyping platform (e.g., HAPS or Xilinx).

Responsibilities

• Create board images and bit files for FPGA prototyping platforms.
• Design custom FPGA RTL for protocol interfaces and feature enablement.
• Release stable platforms to the firmware team and maintain them as the design evolves.
• Develop and extend custom Python tooling to interface with the FPGA platform.
• Debug FPGA and post-silicon issues using tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
• Drive post-silicon bring-up and validation in the lab, including running validation suites on first silicon and meeting bring-up exit criteria.
• Debug platform issues such as JTAG failures, UART connectivity, and boot failures alongside cross-functional teams.
• Root-cause failing post-silicon tests, analyze scan dumps for low-level issues, and coordinate cross-team debug to deliver fixes.

Requirements

• Experience developing C and C++ test content for subsystem and SoC verification, including bare-metal and firmware-style tests.
• Working knowledge of SystemVerilog testbenches.
• Experience bringing up and maintaining FPGA prototyping or emulation platforms (e.g., HAPS or Xilinx), including board images, platform tooling, and testbench changes.
• Hands-on hardware debug experience with tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
• Experience with post-silicon verification of IP, subsystems, or SoCs through the full cycle, including test planning, test development, failure debug, and coverage signoff.
• Experience with post-silicon bring-up and validation, including debugging boot, platform, and connectivity issues in a lab environment.
• Proficiency in Python or similar scripting languages (e.g., Perl, Ruby) for test automation, build flows, and log/data parsing.
• In-depth knowledge of verification principles, testbench architecture, and stimulus generation.
• Experience with industry protocols such as AMBA (AXI/AHB/APB), JTAG, SPI, I2C/I3C, and USB.
• Strong understanding of silicon and/or computer architecture.
• Ability to collaborate across architecture, design, firmware, and validation teams with strong communication skills.

Benefits

• Competitive financial compensation, including various compensation plans.
• Medical, dental, and vision insurance.
• 401k with matching contributions.
• Short-term and long-term disability insurance.
• Health Savings Account (HSA) and Health Reimbursement Account (HRA) options.
• Paid time off (including sick, holiday, and vacation).
• Tuition reimbursement.
• Growth opportunities.

Schedule

Fully on-site at the Mountain View, CA office. Must be able to travel to an Arrow Client office location as requested.