Field-Programmable Gate Arrays Engineer

Research

Conduct research on signal processing techniques, communication protocols, and hardware design methodologies. Stay up to date with industry trends and advancements in FPGA and SDR technologies to inform design decisions and improve system performance.

Design

• Create high-level architectures and create internal design documents to guide the engineering process and testing.
• Develop algorithms to meet system requirements, using appropriate tools and methodologies.
• Collaborate with team members to gather requirements and translate them into a working design.

Development

• Write and optimize VHDL/Verilog code, leveraging internal libraries or creating custom components and finite state machines (FSMs).
• Develop software applications to support FPGA/SDR functionality, including configuration, control, and data processing.
• Ensure compliance with team's coding standards and best practices.

Simulation and Testing

• Debug, test, and optimize designs across various environments to ensure functionality and performance by simulating and deploying designs to hardware.
• Collaborate with field engineers to support final testing and validation efforts.

Qualifications

• 3+ years of experience developing SDR solutions.
• Linux experience.
• VHDL programming experience.
• FPGA Toolchains (Vivado or Quartus) experience.
• Basic Git, SVN, or Mercurial experience for version control.
• Must be a U.S. citizen with an active DoD Secret Clearance (Top Secret/SCI Clearance preferred).
• Strong written and spoken communication skills with the ability to discuss complex topics in detail.
• Ability to work on a team and collaborate with engineers and technicians to integrate hardware and software components.

Preferred Qualifications

• BS or MS in Electrical, Computer Engineering or related Science, Engineering, Technology, Mathematics Field.
• RF communications experience.
• Ability to work with RF test equipment: Spectrum Analyzer, RSA, Vector Waveform Generator.
• Begineer/Intermediate experience with C, Python.
• Intermediate/Advanced experience in VHDL.
• Experience with FPGA software debugging tools using JTAG (ChipScope or SignalTap).
• Desire to pass the torch and mentor other team members (from junior to senior level) on your development accomplishments to grow the knowledge of the entire team.

Benefits

• Offers an excellent benefits package:
• The company currently pays 100% of employee medical, dental, and vision premiums and funds a Health Reimbursement Account (HRA) that covers initial out of pocket costs.
• Paid Leave - Four weeks of PTO (vacation/sick time).
• 100% Employer-paid premiums for Medical, Dental, Vision, and Prescription Drug plans.
• Employer funded HRA ($2K single/$4K family).
• Employer-paid Life Insurance ($100K).
• Employer-paid Short-Term and Long-Term Disability Plans.
• Paid Holidays (11 per year).
• 401K Plan (contributions matched up to 4% of salary, immediately vested).
• Bonus Plan (historically paid at least once per year).
• Employee Referral Bonus Plan.
• Employee Tuition Reimbursement Plan.