Fab Process Engineering Lead, Raxium

About the role

As a Fab Process Engineering Lead, you will join Raxium’s talented team in Silicon Valley. Raxium’s technology is based on GaN‑on‑Si micro LEDs, with more demanding process requirements than typical LED fabs. You will select, motivate, set priorities, develop and manage individual performance to ensure functional excellence and engaged team members, contributing to innovative products used by billions worldwide.

Google’s Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, such as augmented reality (AR) and light‑field displays. With start‑up roots and a state‑of‑the‑art compound semiconductor fab, Raxium is building an engineering team to disrupt next‑generation display markets.

Minimum qualifications

• Master’s degree in Electrical Engineering, Physics, Materials Science, Chemistry or a related field, or equivalent practical experience.
• 10 years of experience in semiconductor process engineering in wafer fab manufacturing (e.g., patterning and lithography, wafer bonding and CMP, wet chemical processes, plasma processing, etc.).
• 7 years of technical leadership experience.

Preferred qualifications

• Ph.D. in Electrical Engineering, Physics, Materials Science, Chemistry or a related field, or equivalent practical experience.
• Black Belt Six Sigma practitioner.
• 15 years of experience in semiconductor process engineering in high‑volume wafer fab manufacturing.
• Experience in device fabrication and process integration of semiconductor optoelectronics devices.
• Fab technical leadership experience defining process robustness strategy, managing engineering cross‑functions, influencing senior stakeholders, and handling executive communication.
• Expertise in structured problem‑solving, data query, and analysis.

Responsibilities

• Own selected process engineering areas, ensuring seamless transitions from proof‑of‑concept to manufacturing.
• Drive the strategic wafer fab roadmap and deliver key performance indicators (KPIs) by overseeing process innovation, new tool installations, and process capability enhancements.
• Implement equipment and process optimization to maximize production efficiencies and wafer output.
• Utilize statistical process control (SPC), failure mode and effect analysis (FMEA), and structured problem‑solving (RCA) to eliminate systemic bottlenecks and enhance lithography and etch module stability.
• Act as the primary technical liaison for fab operations, ensuring safety, quality, and manufacturability standards are surpassed.
• Cultivate an engaged engineering team through proactive performance management and talent development.

Pay

US: $236,000 – $329,000 (USD) plus a 25% bonus target, equity, and benefits.

Benefits

Learn more about benefits at Google.