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Jobs · Information Technology · Texas

Experienced Module Integration Engineer

Samsung Semiconductor · Austin, TX · 1 mo ago
On-siteInformation Technology$95k–$120k/yrFull-time

About the Role

We are seeking a motivated and high‑caliber Module Integration Engineer to join our 2nm GAAFET team. This role focuses on Front‑End‑of‑Line (FEOL) integration, specifically targeting the RPMG (Replacement Metal Gate) and CTSDB (PC and NS isolation) modules. As we transition from FinFET to GAAFET architecture, you will play a critical role in bridging the gap between unit process development and overall device performance, working at the intersection of lithography, etch, deposition, and device physics to ensure successful integration of the gate stack and contact modules for the next generation of computing.

Responsibilities

  • Module Ownership: Support integration and optimization of the RPMG and CTSDB modules to meet target device specifications for the 2nm node, including daily trend monitoring and responsive actions.
  • Process Integration: Collaborate with unit process engineers (Etch, CVD, ALD, CMP, Litho) to address module risks or issues related to process control and optimization.
  • Characterization & Analysis: Execute and analyze Design of Experiments (DOE) to evaluate impact of process variations on electrical performance.
  • Failure Analysis: Interpret advanced metrology and analysis data (TEM, SEM, AFM, EDX) to identify root causes of module failures and implement corrective actions.
  • Data Management: Leverage statistical software (e.g., Cloud Data Sources, Spotfire, Python) to analyze large datasets and correlate process parameters with device yield.
  • Cross‑Functional Collaboration: Participate in design reviews and synchronization meetings with Device and Layout teams to ensure manufacturability.

Qualifications

  • Master’s degree in Materials Science, Chemistry, Physical Chemistry, Physics or a closely related field (industry experience may substitute for advanced degree).
  • Preference for Ph.D. in the same disciplines.
  • 2‑3 years of relevant experience preferred, but not required.
  • Knowledge of MOSFET physics (GAAFET preferred; FinFET also desired), including interfacial physics, gate oxide, threshold voltage control, gate capacitance, performance and reliability.
  • Process knowledge of semiconductor steps such as depositions (ALD/CVD), etch, CMP, etc.

Skills

  • Programming: Intermediate proficiency in Python, R, SQL for automating data extraction and visualization.
  • Standard Office Software: Advanced use of Microsoft Excel (including VLOOKUP, MATCH) and PowerPoint.
  • Data Analysis Software: Proficiency in Spotfire, Minitab, or similar statistical tools for yield and process analysis.
  • Project Management: Familiarity with Waterfall and Agile workflows; experience with Confluence and Jira.

Pay

The base salary range for this role is $95,000 – $120,000, with actual compensation depending on duties, work location, education, skills, qualifications and experience. Total compensation includes a competitive benefits package and may include participation in company incentive compensation programs based on organizational and individual performance.

Benefits

  • Medical, dental, and vision insurance
  • Life insurance and 401(k) matching with immediate vesting
  • On‑site café(s) and workout facilities
  • Paid maternity and paternity leave
  • Paid time off (PTO) plus 2 personal holidays and 10 regular holidays
  • Wellness incentives and additional programs
  • Eligibility for MBO bonuses based on company, division, and individual performance
  • Full‑time on‑site employment

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