DV Intern
About the role
We are seeking a Design Verification Intern to ensure the custom IPs powering our chips, including systolic arrays, DMA engines, and NoCs, are robust, high-performance, and silicon-ready. This role requires creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.
Responsibilities
- Ensure the robustness and performance of custom IPs such as systolic arrays, DMA engines, and NoCs
- Collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack
Requirements
- Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field
- Familiarity with high-speed digital logic
- Exposure to ASIC or SoC design concepts
- Familiarity with SystemVerilog, UVM, or Python
- Familiarity with verification work and writing test benches
- Familiarity with physical design flows and tooling
Qualifications
- Able to learn quickly about transformers and other aspects of modern artificial intelligence
- Strong candidates may also have experience with modern ML and LLM model architectures
- UVM or formal verification experience
- Ability to program with Python or another scripting language
Skills
- SystemVerilog, UVM, or Python
- Verification work and writing test benches
- Physical design flows and tooling
- Transformers and other aspects of modern artificial intelligence
- Modern ML and LLM model architectures
- UVM or formal verification experience
- Python programming
Benefits
- 12-week paid internship
- Generous housing support for those relocating
- Daily lunch and dinner in our office
- Based at our office in San Jose (Santana Row)
- CADirect mentorship from industry leaders and world-class engineers
- Opportunity to work on one of the most important problems of our time
Pay
Details TBA
Schedule
Details TBA
Contact
If you have any questions, please contact internships@etched.com
How We’re Different
We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.