Distinguished CAD Engineer

About the role

Ampere Computing is seeking a highly experienced and visionary Distinguished Engineer to lead the development and optimization of our CAD flows. This role requires deep expertise in EDA tools, semiconductor design methodologies, and flow automation to enable rapid, high-quality silicon delivery. As a technical leader, you will collaborate across architecture, design, verification, and manufacturing teams to define and implement cutting-edge CAD strategies that enhance productivity and chip performance.

Responsibilities

• Define the global physical design methodology strategy across all phases: synthesis, floor planning, placement, clock tree synthesis (CTS), routing, timing closure, and physical verification.
• Architect and deploy advanced CAD flows to support complex, high-performance System-on-Chip (SoC) and Application-Specific Integrated Circuit (ASIC) designs.
• Explore and integrate AI/ML-driven EDA features to optimize PPA and shorten turnaround times.
• Build and drive PPA optimization recipes for various subsystems.
• Enhance low-power flow to support multi-power domain (UPF).
• Drive innovation in hierarchical design, multi-die/chiplet integration, and IC Design methodologies.
• Allocate engineering resources efficiently to support concurrent, multi-project execution timelines.
• Develop a culture of continuous learning, automation, and technical excellence.
• Evaluate, benchmark, and select state-of-the-art EDA tools to improve engineering productivity and design quality.
• Drive the creation of robust scripting infrastructure (using Tcl, Python, Perl) to automate repetitive tasks and ensure flow consistency.
• Partner closely with RTL Design, DFT (Design for Test), Architecture, and Physical Implementation teams to ensure seamless handoffs and tool interoperability.
• Collaborate with external foundries to integrate Process Design Kits (PDKs) and resolve complex deep sub-micron physical effects (e.g., electromigration, IR drop, thermal management).

Proficiency in EDA tool suites (e.g., Innovus, Fusion Compiler, PrimeTime, Calibre).

Requirements

• 15+ years of experience in semiconductor CAD/EDA development or flow engineering, preferably in CPU or high-performance SoC design environments.
• Proven track record of leading complex CAD flow projects from concept through tapeout.
• Deep knowledge of RTL synthesis, placement & routing, timing closure, signoff methodologies, and design for manufacturability.
• Expertise with major EDA tools (Synopsys, Cadence, Mentor, etc.) and scripting languages (Tcl, Python, Perl).
• Strong problem-solving skills and ability to drive cross-functional collaboration.
• Excellent communication skills and experience mentoring senior engineers.
• Experience with cloud-based design environments and scalable compute infrastructure is a plus.

Electrical or Computer Engineering - Bachelor’s degree & 15 years of related experience; or Master's degree & 12 years; or PhD & 8 years.

Benefits

• Premium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan.
• Unlimited Flextime and 10+ paid holidays.
• A variety of healthy snacks, energizing espresso, and refreshing drinks.

Pay

The full base pay range for this role is between $279,500 and $419,500, except in the San Francisco Bay Area where the range is between $293,000 and $440,000.