Director AI/ML Driven ASIC Design and Implementation Automation

About the role

As a Director of AI/ML-driven ASIC Design and Implementation Automation in our AI & Chip Engineering (ACE) organization, you will work in a dynamic environment to explore methodology, flows, and tools to improve efficiency and quality of results (power, performance, area, and quality) for SoC and IP development teams across the organization. You'll connect with AI/ML and automation experts in the industry and academia to explore state-of-the-art AI/ML CAD techniques as part of VLSI CAD software, prescribe key methods and requirements for tools and features to leverage for ASIC design.

In this role, you will develop prototype solutions to evaluate various state-of-the-art AI/ML techniques to identify the best solutions for NXP designs. While exploring these new ways of working, you will work on actual designs and implementation to pilot and develop the automation. This opportunity is within the ACE Design Methodologies and Automation organization to enable Digital Transformation, leveraging state-of-the-art AI/ML ideas to improve NXP designs for Automotive Processors and Advanced Microcontrollers.

The right candidate will work in a fast-paced engineering environment on leading-edge advanced node technologies, enabling automated building of exciting and complex SoCs.

Responsibilities

• Explore research ideas and solutions that bring AI/ML applications to VLSI design.
• Work closely with academic research communities in AI/ML for VLSI design, architecture teams, IP and SoC designers, and SoC implementation teams from multiple sites to explore and evaluate leading-edge SoC technologies serving multiple industries.
• Develop automation applications including the use of GenAI, Reinforcement Learning, Graph Neural Networks, and Convolutional Networks.
• Coordinate and drive groundbreaking initiatives for Digital Transformation across multiple NXP Engineering teams, including Architecture, IP & SoC design, verification, and implementation functions.

Requirements

• BS or MS in Computer Science, Electrical Engineering, Computer Engineering, or related disciplines with a strong background in software development.
• Hands-on expertise in programming using Python/C++.
• 7+ years of experience in AI and ML techniques (LLMs, CNN, RNN, and GraphNN) with experience applying them to real-world optimization problems.
• Experience with data structures, algorithms, and software development for optimization problems.
• Hands-on experience in Unix/Linux, revision control (Git, BitBucket), and software development and debug tools.
• Excellent analytical problem-solving skills.
• Strong verbal and written communication skills.

Desirable Skills

• Strong understanding of design, layout, constraints (SDC, Clocks, CDC, RDC), Static Timing Analysis, Low-power, and Power-aware flows (UPF).
• Prior experience in VLSI CAD methodology and tool development.
• Good understanding of HDL: System Verilog, Verilog, VHDL, front-end design, physical design, and layout implementation/generation flows and tools.
• Understanding or prior experience with EDA tools for design, verification, DFT, and implementation.
• Experience with design revision control (Git, DesignSync) and Make.
• Experience with Splunk, Jenkins, LSF, and CI/CD processes.

Job location: San Diego, CA