Digital Design RTL Engineer
Broadcom · Fort Collins, CO · 2 days ago
EngineeringFull-time
Responsibilities
- Operate with a high degree of autonomy, taking designs from initial specification through to timing closure and physical design hand-off
- Collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule
- Show high proficiency in SystemVerilog
- Show proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques
Requirements
- BSEE required, MSEE/PHD preferred
- 8+ years of industry experience with a focus on SoC integration, LPDDR5/6, DDR4/5 and/or high-speed SerDes, or HBM protocols is highly preferred
Qualifications
Deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis, and Reset Domain crossing (RDC)
Skills
- SystemVerilog
Pay
The annual base salary range for this position is USD 121,900.00 To USD 195,000.00
Schedule
Not specified
Benefits
- Medical, dental and vision plans
- 401(K) participation including company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Company paid holidays
- Paid sick leave and vacation time