Digital Design Engineer

Responsibilities

• Design and implement digital subsystems and IP blocks for mixed-signal ICs from architecture through tape-out.
• Develop RTL designs using Verilog and support integration into larger SoC environments.
• Design and verify DSP, control, and data-path logic, including calibration and monitoring state machines.
• Perform functional verification, integration verification, and support UVM-based verification teams.
• Contribute to behavioral and system modeling of digital and mixed-signal systems.
• Support post-silicon validation, characterization, and production test, including lab bring-up and silicon debug.
• Collaborate across disciplines to ensure correct interaction between digital logic and analog circuitry.
• Participate in design reviews, tape-out readiness, and root-cause analysis for silicon or system issues.

Requirements

• Degree in Electrical Engineering, Computer Engineering, or a related technical field.
• Bachelor’s with 2+ years of relevant digital IC design experience.
• Master’s with 0+ years of relevant experience.
• Strong working knowledge of Verilog RTL design.
• Solid understanding of the digital design flow, including:
• Microarchitecture and RTL development.
• Clock and reset domain crossing.
• Functional verification.
• Timing constraints and synthesis.
• Experience designing and verifying complex state machines and control logic.
• Familiarity with CMOS VLSI design fundamentals.
• Strong analytical, problem-solving, and communication skills.
• Ability to work effectively in a team-based, fast-paced development environment.

Qualifications

• Expertise or strong background in Digital Signal Processing (DSP).
• Experience implementing FIR and IIR filters and other signal-processing algorithms.
• Familiarity with ARM-based SoCs, microprocessor subsystems, buses, and peripherals.
• Experience with mixed-signal IC development, including interaction between digital and analog circuitry.
• Exposure to low-power and high-performance ASIC design techniques.
• Experience with back-end flows, including synthesis, place & route, and timing analysis.
• Experience generating test vectors and supporting production or probe test environments.
• Proficiency with MATLAB, Simulink, or similar tools for modeling, algorithm development, and validation.
• Strong lab and silicon validation skills, including silicon debug and characterization.