CPU Core Logic Designer

About the role

Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs. Participates actively in the definition of architecture and microarchitecture features of the CPU being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Documents micro architectural specs (MAS) of the CPU features being designed. Supports SoC customers to ensure high quality integration of the CPU block.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or Computer Science and 2+ years of experience or a Master's degree in Electrical/Computer Engineering or Computer Science and 1+ years of experience.
• 6+ months combined experience in: System Verilog/Verilog/VHDL and/or VCS or similar Simulator, Logic design and/or front end, Computer architecture and microarchitecture, Software/programming languages (i.e. C, C++, C#, Visual Basic/.NET. Perl, Python, Java, etc.).
• Knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
• Experience with high speed circuit design and optimization for Datapath, circuits and/or arrays.
• Familiarity with circuit planning and timing convergence.
• Experience working with cross functional teams (Architecture, Spec development, Design, Formal, Verification).

Requirements

• Minimum Qualifications: Bachelor's degree in Electrical/Computer Engineering or Computer Science and 2+ years of experience or a Master's degree in Electrical/Computer Engineering or Computer Science and 1+ years of experience.
• Preferred Qualifications: Knowledge of Intel Architecture ISA and system architecture, including x86 assembly language. Experience with high speed circuit design and optimization for Datapath, circuits and/or arrays. Familiarity with circuit planning and timing convergence. Experience working with cross functional teams (Architecture, Spec development, Design, Formal, Verification).

Pay

$122,440.00 - 172,860.00 USD

Schedule

Shift 1 (United States of America)