Chipset Power Engineer

Hiring in multiple locations: Austin, Portland, Santa Clara, San Diego.

About the Role

Qualcomm Data Center team is developing high-performance, energy-efficient server solutions for data center applications. We are looking for highly talented, innovative, and teamwork-oriented individuals to join our cutting-edge technology work.

Our mission is to transform the industry by reimagining silicon and developing next-generation computing platforms. By joining our team, you’ll collaborate with world-class engineers to create innovative solutions that push the limits of performance, energy efficiency, and scalability. Our focus is on developing server-class, high-performance solutions highly optimized for server product needs.

Responsibilities

• Develop end-to-end power modeling framework to support server use cases.
• Perform tradeoff analysis for various workloads and use cases.
• Identify gaps relative to targets and propose feature enhancements to meet product KPIs.
• Collaborate with IP, SoC, and platform power and thermal engineers to optimize KPIs of the system.
• Work in a dynamic environment with top-level engineers and technologists.

Requirements

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
• OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of related work experience.
• OR PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of related work experience.

Preferred Qualifications

• Over 10 years of experience in power estimation, modeling, and optimization of CPU and/or SoCs, with at least 5 years in high-performance server chips.
• Strong expertise in power management of high-performance systems, including active power, idle low power, and silicon/system limits.
• Strong fundamentals in digital ASIC design and power of CMOS circuits.
• Excellent technical documentation, written, and verbal communication skills.
• Master's in Computer Science/Engineering, Electrical Engineering, or related field with 15 years of experience in low power design and optimization.
• Experience in design and/or analysis of low power features at SoC, chipset, and platform level.
• Experience in hardware and software co-design of optimizations for low power features.
• Experience in power delivery systems including multi-phase bucks and LDOs.
• Experience in modeling peak current transients of the various IPs in the system.
• Strong understanding of silicon test methodologies for power and thermal optimization.
• Proven track record in hyperscale data center solutions.
• Familiarity with high-performance and low-power design techniques.

Skills

• Server SoC design and architecture.
• Power, performance, and thermal metrics estimation, analysis, and optimization.
• CPU and SoC power estimation methodologies and workload modeling for datacenter SoCs.
• Cross-functional collaboration with hardware and software teams.
• Analytical and problem-solving skills.

Pay

$220,200.00 - $330,400.00

Benefits

• Competitive annual discretionary bonus program (employees on sales-incentive plans are not eligible).
• Annual RSU grants.
• Comprehensive benefits package designed to support success at work, at home, and at play.