Analog Mixed Signal Circuit Design
NXP Semiconductors · San Jose, CA · 3 wk ago
HybridArt & Creative$192k–$263k/yrFull-time
Job Summary
Seeking a Principal or Senior Principal Circuit Designer to design and deliver high-speed, high-linearity analog and SERDES circuit blocks that form the Analog Front End (AFE) of automotive transceivers. This is a hands-on individual contributor role requiring deep expertise in TX, RX, and clocking circuit design for high-speed PHYs.
Role Responsibility
- Analog / SERDES Circuit Design
- Design and simulate analog circuit blocks that comprise the AFE, including: Transmit (TX) circuits: line drivers, pre-drivers, output stages Receive (RX) circuits: front-end amplifiers, CTLE, PGA, slicers Clocking circuits: PLLs, DLLs, clock distribution, jitter filtering
- Translate system- and PHY-level requirements into robust block-level specifications.
- Optimize designs for linearity, noise, jitter, power, area, and robustness.
- Perform detailed transistor-level simulations across PVT corners and full automotive temperature ranges.
- Silicon Bring-Up, Debug & Production Support
- Support silicon bring-up, characterization, and validation of analog/SERDES blocks.
- Correlate simulation results with silicon measurements and drive design improvements.
- Collaborate with layout, digital, DSP, systems, test, and product engineering teams.
- Drive resolution of performance, yield, and reliability issues through root-cause analysis.
Technical Leadership (Principal / Sr Principal Scope)
- Serve as block-level technical owner for critical analog/SERDES functions.
- Participate in and lead technical design reviews.
- Influence AFE and PHY architecture decisions through deep technical expertise.
- Mentor senior and mid-level designers and contribute to design best practices.
Qualification
- Education: MSEE or PhD in Electrical Engineering or equivalent (strongly preferred).
- Experience: 12–15+ years of experience in analog or mixed-signal IC design (Principal). 15–20+ years of experience for Senior Principal level.
- Proven hands-on experience designing high-speed SERDES or wireline analog circuits.
- Demonstrated success delivering TX, RX, and clocking circuits to production silicon.
- Extensive experience with circuit design, simulation, and debug at the transistor level.
- Core Technical Expertise: High-speed TX and RX circuit design Linearity, distortion, and noise analysis Jitter generation, tolerance, and clock integrity PLL / DLL and clocking architectures PVT variation and automotive robustness Advanced CMOS processes for high-speed analog
- Desired Experience: Direct experience with one or more of the following: 10GBASE-T, 10GBASE-T1 (Automotive Ethernet) TDD-based transceivers Familiarity with automotive semiconductor requirements (AEC-Q100, temperature, EMI/EMC). Experience supporting automotive production ramp and customer qualification Exposure to ISO 26262 / functional safety concepts is a plus.