Analog Circuit Design Engineer

About the role

This position offers a unique opportunity to innovate and impact Intel's Data Center and AI product lines, ensuring high-quality and efficient analog and mixed-signal circuit designs that drive meaningful change in the technology landscape.

Responsibilities

• Design and develop complex analog and mixed-signal circuits, including transmitters (TX), receivers (RX), amplifiers, filters, clocking systems, and on-die voltage regulators
• Perform circuit analysis and tradeoffs to optimize power, performance, area, timing, and yield
• Create and validate behavioral models for analog and mixed-signal IPs for system-level integration
• Develop and oversee floorplans and layouts while ensuring adherence to design rules and robustness
• Conduct small signal analysis, stability testing, and compensation of feedback loops to meet performance specifications
• Collaborate with architecture, layout, and validation teams to ensure seamless integration of designs into products
• Author microarchitecture specifications, test plans, and documentation for design verification and validation
• Conduct post-silicon validation and debug to ensure design functionality and performance meet product requirements
• Provide technical mentorship and contribute to design reviews to enhance team-wide engineering excellence
• Leverage industry-standard tools and methodologies, such as Synopsys and Cadence, for design and simulation

Qualifications

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering or Computer Engineering with 3+ years of experience, or
• Master's degree in Electrical Engineering or Computer Engineering with 2+ years of experience, or
• PhD in Electrical Engineering or Computer Engineering

The years of experience must include:

• VLSI analog circuit design, small-signal analysis, and understanding of foundational digital design concepts
• Synopsys and Cadence design tools and flows
• Design optimization techniques related to performance, power, and area

Skills

Preferred skills and experience:

• Knowledge of high-speed IO signaling, transmission line theory, and power delivery concepts
• Familiarity with PLLs, ADCs, DACs, switched-capacitor circuits, and noise analysis methodologies
• Experience with scripting, Matlab, and post-silicon characterization using lab tools such as oscilloscopes and signal generators
• Cross-disciplinary knowledge in analog integration, RTL, static timing analysis, and power grid design
• Proven track record of system-level understanding, problem-solving, and effective collaboration in a team setting
• VS Code, Python, and GitHub Copilot

Professional traits for success:

• Effective collaborator who works well across cross-disciplinary teams including architecture, layout, and validation
• Strong problem-solver with a system-level mindset and the ability to navigate complex technical tradeoffs
• Committed to engineering excellence through mentorship, thorough documentation, and active participation in design reviews

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.

Pay

Annual Salary Range for jobs which could be performed in the US: $122,440.00 - 232,190.00 USD. The range displayed reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.

Schedule

This role is eligible for Intel's hybrid work model, allowing employees to split their time between working on-site at their assigned Intel site and off-site.

Shift 1 (United States of America)

Primary Location: US, California, Santa Clara
Additional Locations: US, California, Folsom