AI Accelerator System Architect

About the Company

SambaNova Suite™ is the first full-stack, generative AI platform, from chip to model, optimized for enterprise and government organizations. Powered by the intelligent SN40L chip, the SambaNova Suite is a fully integrated platform, delivered on-premises or in the cloud, combined with state-of-the-art open-source models that can be easily and securely fine-tuned using customer data for greater accuracy. Once adapted with customer data, customers retain model ownership in perpetuity, turning generative AI into one of their most valuable assets.

About the Team

The System Architecture team owns architecture for RDU-based platforms at the board, rack, and cluster level, covering SambaRack-class server and rack design, the scale-up and scale-out interconnect fabric, power delivery, and air and liquid cooling. We write the specifications ODM/OEM and component partners build to, evaluate their proposals, and make the build, buy, and co-develop calls. We define the bring-up, validation, and qualification plan for each platform, and work with signal and power integrity engineers, SambaFlow, ML performance, and datacenter operations to keep architecture decisions matched to the workloads running on the systems.

About the Role

As a Senior RDU System Architect, you'll be part of the team that turns silicon into shippable systems — SambaRack-class server and rack designs, the scale-up/scale-out fabric that links RDUs together, and the power and cooling envelope that lets dense AI compute run efficiently in a real data hall. You'll set direction across build, buy, and co-design decisions with hardware partners, write the specifications those partners build to, and stay engaged from architecture definition through bring-up, qualification, and fleet deployment.

Responsibilities

• Platform & Rack Architecture: Define the architecture of RDU-based server and rack platforms, from board layout and chassis design through full-rack integration. Translate product and customer requirements into system specifications for engineering teams and vendors. Select and validate major system components — RDU sockets, memory modules, power supplies, chassis mechanicals — balancing performance, power envelope, and manufacturability. Build performance and cost models to compare candidate rack configurations.
• Fabric, Power & Thermal: Architect the scale-up and scale-out interconnect fabric linking RDUs into larger training and inference clusters, choosing topology, switch/NIC hardware, and optics to hit bandwidth and latency targets. Own the power delivery architecture (including high-density/48V-class distribution) and the cooling strategy — air and liquid — needed to keep dense, multi-socket racks within thermal budget. Work with signal and power integrity engineers to confirm designs hold up in the lab.
• Partner & Supply Chain Engineering: Evaluate ODM/OEM and component vendor proposals against system requirements, deciding where to build in-house, buy off the shelf, or co-develop. Flag schedule or technical risks in partner designs early and drive changes to close gaps. Maintain a working map of the vendor and technology landscape for boards, interconnect, power, and cooling to feed the platform roadmap.
• Bring-Up, Qualification & Field Reliability: Define the bring-up, validation, and qualification plan for each new platform, including reliability (RAS) and telemetry targets for customer data halls. Lead root-cause investigations when platform behavior diverges from projections in the lab or field.
• Cross-Team Technical Leadership: Partner with the SambaFlow software/compiler team, ML performance, and datacenter operations to align system architecture with workloads. Brief executive leadership on architecture tradeoffs and keep the roadmap aligned to customer and product priorities. Mentor engineers on system architecture methodology and help build the review process and spec standards.

Requirements

• B.S. or M.S. in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
• 12+ years architecting hardware systems for hyperscale, HPC, or AI/ML infrastructure.
• Deep, hands-on background in at least one systems domain, such as interconnect, power delivery, thermal/cooling, or mechanical, for large-scale AI accelerator, HPC, or hyperscale systems.
• Experience owning system architecture at board, rack, or cluster scale, including writing specs for engineering teams and vendors.
• A track record of carrying a system through architecture definition, bring-up, and volume production.
• Direct experience holding external vendors and ODM/OEM partners accountable to technical specifications.
• Comfortable reasoning across interdependent domains (e.g., how interconnect choices affect power and thermal budgets, which influence mechanical design).
• A history of making and owning directional calls, and building alignment across engineering and partner teams.
• Clear technical writing for specs and reviews that other teams rely on.

Preferred Qualifications

• Hands-on experience with AI accelerator platforms (RDU, GPU, TPU, or custom ASIC) and the fabrics that scale them up and out.
• Fluency in chip- and package-level design to collaborate with silicon and packaging architects.
• Experience standing up a new engineering function, review process, or design practice from scratch.

Pay

Base salary range: $250,000–$350,000 USD.

Benefits

• Medical insurance: 95% premium coverage for employees, 77% for dependents, plus Health Savings Account (HSA) with employer contribution.
• Dental, Vision, Short/Long-term Disability, Basic Life, Voluntary Life, and AD&D insurance plans.
• Flexible Spending Account (FSA) options: Health Care, Limited Purpose, and Dependent Care.
• Well-being benefits: Full subscription to Headspace, Gympass+ membership (access to physical gyms), One Medical membership, counseling services via Employee Assistance Program, and more.
• Equity as part of total rewards package.